Commit 80f59767 authored by Martin Vítek's avatar Martin Vítek

Chenges in interrupt handling

parent 3dfeabde
......@@ -17,7 +17,12 @@ namespace ENC28J60_namespace
{
ENC28J60::ENC28J60(SPI &spi,
volatile PortGroup& cs_port, const uint8_t cs_bit,
volatile PortGroup& irq_port, const uint8_t irq_bit): ENC28J60_SPI(spi, cs_port, cs_bit, irq_port, irq_bit)
volatile PortGroup& irq_port, const uint8_t irq_bit): ENC28J60_SPI(spi, cs_port, cs_bit, irq_port, irq_bit),
pending_interrupt(false),
flag_tx_done(true),
flag_link_changed(false),
flag_pending_packet(false),
waiting_for_tx_end(false)
{
test_RXEN_corruption();
}
......@@ -352,6 +357,107 @@ namespace ENC28J60_namespace
}
void ENC28J60::rx_handler(ethernet_frame& buffer)
{
}
void ENC28J60::tx_handler(ethernet_frame& buffer)
{
if (flag_tx_done)
{
//TX was done, check if it was successful
if (waiting_for_tx_end)
{
if (read_control_register(ESTAT) & TXABRT_bm)
{
//TODO: check for abort cause and retransmit packet
debug.error("TX was not successful");
uint16_t packet_end_address;
packet_end_address = read_control_register(ETXNDL);
packet_end_address |= ((uint16_t)read_control_register(ETXNDH))<<8;
//Read back status vector
write_control_register(ERDPTL, (packet_end_address+1)&0xFF);
write_control_register(ERDPTH, (packet_end_address+1)>>8);
tx_status_vector status;
read_buffer_memory(status.vector, 7);
debug.tx_status(status);
}
else
{
debug.info("TX was successful");
}
waiting_for_tx_end = false;
}
//if ()
}
}
void ENC28J60::get_interrupt_source()
{
interrupt_flags flags;
flags.value = read_control_register(EIR);
uint8_t flags_to_clear = 0;
/* Not implemented
if (flags.bit.rxerif)
{
flags_to_clear |= RXERIF_bm;
}
*/
/* Not implemented
if (flags.bit.txerif)
{
flags_to_clear |= TXERIF_bm;
}
*/
if (flags.bit.txif)
{
flag_tx_done = true;
flags_to_clear |= TXIF_bm;
}
if (flags.bit.linkif)
{
flag_link_changed = true;
//Cleared by reading PHIR PHY register
}
/* Not implemented
if (flags.bit.dmaif)
{
flags_to_clear |= DMAIF_bm;
}
*/
//PKTIF is unreliable
if (read_control_register(EPKTCNT))
{
flag_pending_packet = true;
//Cleared if EPKTCNT is zero
}
if (flags_to_clear) bit_field_clear_in_register(EIR, flags_to_clear);
}
/*
* Methods for testing
*/
......
......@@ -97,9 +97,11 @@ namespace ENC28J60_namespace
uint16_t eth_rx_packet_start;
public:
volatile bool tx_was_successful;
volatile bool link_changed;
volatile bool pending_packet;
volatile bool pending_interrupt;
bool flag_tx_done;
bool flag_link_changed;
bool flag_pending_packet;
bool waiting_for_tx_end;
public:
ENC28J60(SPI &spi, volatile PortGroup& cs_port, const uint8_t cs_bit, volatile PortGroup& irq_port, const uint8_t irq_bit);
......@@ -112,9 +114,13 @@ namespace ENC28J60_namespace
//RX & TX
void tx_frame_blocking(const ethernet_frame &frame);
bool rx_frame_blocking(ethernet_frame &frame);
void tx_handler(ethernet_frame& buffer);
void rx_handler(ethernet_frame& buffer);
//Interrupt handler
inline void interrupt_handler();
void get_interrupt_source();
//For testing
void print_connection_status();
......@@ -127,59 +133,12 @@ namespace ENC28J60_namespace
inline void ENC28J60::interrupt_handler()
{
//TODO: Maybe just set a flag and check interrupt source in main loop
pending_interrupt = true;
//Disable interrupts
bit_field_clear_in_register(EIE, INTIE_bm);
interrupt_flags flags;
flags.value = read_control_register(EIR);
uint8_t flags_to_clear = 0;
if (flags.bit.rxerif)
{
flags_to_clear |= RXERIF_bm;
}
if (flags.bit.txerif)
{
flags_to_clear |= TXERIF_bm;
}
if (flags.bit.txif)
{
tx_was_successful = true;
flags_to_clear |= TXIF_bm;
}
if (flags.bit.linkif)
{
link_changed = true;
//Cleared by reading PHIR PHY register
}
if (flags.bit.dmaif)
{
flags_to_clear |= DMAIF_bm;
}
if (flags.bit.pktif)
{
pending_packet = true;
//Cleared if EPKTCNT is zero
}
if (flags_to_clear) bit_field_clear_in_register(EIR, flags_to_clear);
//bit_field_clear_in_register(EIE, INTIE_bm);
//Enable interrupts
bit_field_set_in_register(EIE, INTIE_bm);
//bit_field_set_in_register(EIE, INTIE_bm);
}
}
#include "NixieStack.h"
#include <cstdint>
#include <machine/endian.h>
#include "fifo.h"
#include "ethernet_frame.h"
#include "NetworkTypes.h"
#include "ARP.h"
NixieStack::NixieStack(): mac(0),
ip(0),
arp(mac, ip)
arp(mac, ip),
rx_buffer(),
tx_buffer()
{
}
......
......@@ -3,6 +3,8 @@
#include <cstdint>
#include <machine/endian.h>
#include "fifo.h"
#include "ethernet_frame.h"
#include "NetworkTypes.h"
#include "ARP.h"
......@@ -15,6 +17,10 @@ class NixieStack
ARP_protocol arp;
public:
fifo<ethernet_frame, 5> rx_buffer;
fifo<ethernet_frame, 2> tx_buffer;
public:
NixieStack();
......@@ -22,3 +28,5 @@ class NixieStack
void set_IP(const uint8_t (&ip)[4]);
};
extern NixieStack stack;
......@@ -30,6 +30,7 @@
#include "ARP.h"
#include "ethernet_frame.h"
#include "NetworkTypes.h"
#include "NixieStack.h"
using namespace ENC28J60_namespace;
......@@ -88,6 +89,10 @@ int main(void)
nixie.display_handler();
nixie.separator.pulsing_handler();
eth.get_interrupt_source();
eth.rx_handler(stack.rx_buffer.read());
eth.tx_handler(stack.tx_buffer.read());
if (adc.done)
{
adc.convert_values();
......@@ -114,7 +119,7 @@ int main(void)
}
}
if (eth.link_changed)
if (eth.flag_link_changed)
{
if (eth.check_link())
{
......@@ -123,7 +128,7 @@ int main(void)
else debug.info("Link down");
eth.link_changed = false;
eth.flag_link_changed = false;
}
/*
......
......@@ -121,75 +121,75 @@
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......
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